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Award Test Sequence after v4.2 (386/486)

Procedure

Meaning

CPU

BIOS sets verifies and resets the error flags in the CPU then performs a register test by writing and reading bit patterns. Failure is normally due to the CPU or clock chip.

Initialise Support Chips

Video is disabled as is parity/DMA and NMI. Then the PIT/PIC and DMA chips are initialised. Failure is normally down to the PIT or DMA chips.

Init Keyboard

Keyboard and Controller are initialised.

ROM BIOS Test

A checksum is performed by the ROM BIOS on the data within itself and is compared to a preset value of 00. Failure is normally due to the ROM BIOS.

CMOS Test

A test of the CMOS chip which should also detect a bad battery. Failure is due to either the CMOS chip or the battery.

Memory Test

First 356K of memory tested with any routines in the chipsets. Failure normally due to defective memory.

Cache Initialisation

Any cache external to the chipset is activated. Failure is normally due to the cache controller or chips.

Initialise Vector Table

Interrupt vectors are initialised and the interrupt table is installed into low memory. Failure is normally down to the BIOS or low memory.

CMOS RAM

CMOS RAM checksum tested, BIOS defaults loaded if invalid. Check CMOS RAM.

Keyboard Init

Keyboard initialised and Num Lock set On. Check the keyboard or controller.

Video Test

Video adapter tested and initialised.

Video Memory

Tested on Mono and CGA adapters. Check the adapter card.

DMA Test

DMA controllers and page registers are tested. Check the DMA chips.

PIC Tests

8259 PIC chips are tested.

EISA Mode Test

A checksum is performed on the extended data area of CMOS where EISA information is stored. If passed the EISA adapter is initialised.

Enable Slots

Slots 0-15 for EISA adapters are enabled if the above test is passed.

Memory Size

Memory addresses above 265K written to in 64K blocks and addresses found are initialised. If a bit is bad, entire block containing it and those above will not be seen

Memory Test

Read/Write tests performed to memory over 256K; failure due to bad bit in RAM.

EISA Memory

Memory tests on any adapters initialised previously. Check the memory chips.

Mouse Initialisation

Checks for a mouse and installs the appropriate interrupt vectors if one is found. Check the mouse adapter if you get a problem.

Cache Init

The cache controller is initialised if present.

Shadow RAM Setup

Any Shadow RAM present according to the CMOS Setup is enabled.

Floppy Test

Test and initialise floppy controller and drive.

Hard Drive Test

Test and initialise hard disk controller and drive. You may have an improper setup or a bad controller or hard drive.

Serial/Parallel

Any serial/parallel ports found at the proper locations are initialised.

Maths Copro

Initialised if found. Check the CMOS Setup or the chip.

Boot Speed

Set the default speed at which the computer boots.

POST Loop

Reboot occurs if the loop pin is set; for manufacturing purposes.

Security

Ask for password if one has been installed. If not check the CMOS data or the chip.

Write CMOS

The BIOS is waiting to write the CMOS values from Setup to CMOS RAM. Failure is normally due to an invalid CMOS configuration.

Pre-Boot

BIOS is waiting to write the CMOS values from Setup to CMOS RAM.

Adapter ROM Initialise

Adapter ROMs between C800 and EFFF are initialised. The ROM will do an internal test before giving back control to the System ROM. Failure is normally due to the adapter ROM or the attached hardware.

Set Up Time

Set CMOS time to the value located at 40h of the BIOS data area.

Boot System

Control is given to the Int 19 boot loader.

BACK

 

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