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Olivetti 1076, AT&T 6312, WGS 80286
??????The first checkpoint, 40, resets and initializes a test monitoring device on the parallel port. When an error occurs, the most recent checkpoint code sent to port 378 is exclusive-ored with 3F to complement the lower 6 bits, and then sent to 378, so if the refresh test fails (45), the POST card will show 7B because the most recent code sent before the failure was 44.
??????If an error occurs, the POST tries to run through a sequence of activities that display a message on the monitor, showing "tttt Error: xx", where tttt is the name of the failing routine, and xxis a suberror number. If the error is fatal, the display will show "Unrecoverable power-up error", wait for you to press F1, and return to the failing test. If video has failed, the POST will output beep codes.

Pass

Fail

Meaning

40

Dummy check?areset black box

41

7F

80286 CPU flags and register test

42

7E

Check and verify shutdown code?aread keyboard status from port 64. if shutdown bit is set, read the shutdown byte from CMOS RAM (and clear the location there), check it for an illegal shutdown condition, initialize the 8259s unless shutdown is 9 or A, and jump to the correct routine to handle the shutdown: 0= warm boot (go to next test), 1= return to advanced protected mode test, 2= return to memory test above 1 Mb, 3=return to protected mode test 2, 4=INT19, 5=send EOI to 8259 and return to user routine, 9=int15 block move, and A=return to user routine.

43

7D

Checksum test the BIOS ROMs?averify contents add up to 0.

44

7C

Test the 8253 timer?acheck all 3 timers for not counting, counting too slowly, or counting too fast. Suberror display is the bad timer number 0, 1, or 2.

45

7B

Start memory refresh and verify it occurs every 15.1 microseconds. Init the manufacturing test byte in RAM.

46

7A

Command the 8041 keyboard controller to do a self-test. Suberror display is 1 if error return, 2 if self-test times out.

47

79

Test the first 8K of RAM in 4 passes: 1) write into each word a data value corresponding to the address; 2) invert all bits written; 3) write an odd parity pattern; 4) write zeros. Only pass 4 is done on a warm boot. Beep once when this test passes. Install dummy interrupt vectors, set up the stack and other memory areas. display power-on banner on screen.

48

78

Test 80286 in protected mode 1?apattern test all IDT and GDT registers, verify LIDT, SIDT, LGDT, and SGDT instructions.

49

77

Test CMOS RAM shutdown byte with a pattern, then clear it.

4A

76

Test 80286 in protected mode 2?aput CPU into protected mode, check it's there, then return to real mode

4B

75

Test RAM from 8K to 640K (cold boot only)?adisplay progress for each 128K block; write, read, and compare the address and inverted address into each word.

4C

74

Test all RAM above IM?asame as below 1 Mb test. Also verify CPU runs properly in protected mode.

4D

73

Test for NMI?ainstalls NMI vector in interrupt table and small service routine. Disables I/O and memory parity errors, then checks for hot NMI.

4E

72

Test for RAM parity

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